ADLINK Technology ACL -6128 Betriebsanweisung Seite 1

Stöbern Sie online oder laden Sie Betriebsanweisung nach Toröffner ADLINK Technology ACL -6128 herunter. ADLINK Technology ACL -6128 User`s guide Benutzerhandbuch

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken

Inhaltsverzeichnis

Seite 1 - ACL-7120A

NuDAQ® ACL-7120A Digital I/O & Timer/Counter Card User’s Guide

Seite 2

4 • Introduction • Mode: 6 programmable modes • Usable pins: Device Usable pins ACL-7120A/3 CLK and GATE for counter 0 - counter 2 ACL-7120A/6 CL

Seite 3

Introduction • 5 1.4 Software Support The ACL-7120A is programmable using simple 8-bit I/O port commands. Users can use high-level languages, such as

Seite 5 - Table of Contents

Installation • 7 2 Installation This chapter describes how to install the ACL-7120A. Please carefully review the unpacking information before removin

Seite 6 - How to Use This Guide

8 • Installation 2.2 Unpacking Your ACL-7120A card contains sensitive electronic components that can be easily damaged by static electricity. Prepa

Seite 7 - Introduction

Installation • 9 2.3 ACL-7120A Layout Figure 2.1 7120A Layout SW1CN1 CN2 CN3 CN4 CN5JP1JP2JP3Count 0 Count 1 ● ●●●●●●●●●●●●●●●●●●●●●●●●●●

Seite 8 - 1.2 Applications

10 • Installation 2.4 Jumper and DIP Switch Description The ACL-7120A channels and base addresses can be changed through jumper settings and DIP swi

Seite 9 - 1.3 Specifications

Installation • 11 2.5 Base Address Setting The ACL-7120A requires eight consecutive address locations in the I/O address space. The base address of

Seite 10

12 • Installation How to define the base address for the ACL-7120A? DIP1 through DIP6 in the switch SW1 are one-to-one corresponding to the PC bus

Seite 11 - 1.4 Software Support

Installation • 13 2.6 Interrupt Settings To use the interrupt function, a second counter chip (CNT 1) needs to be installed on the ACL-7120A/3. The a

Seite 13 - Installation

14 • Installation JP3*default setting :TME IRQEXT IRQEVT IRQTME IRQ Figure 2.4

Seite 14 - 2.2 Unpacking

Installation • 15 2.7 Clock Frequency Settings The ACL-7120A board offers 3 frequency sources: 10kHz, 100kHz, and 1 MHz. These frequencies can be do

Seite 15 - 2.3 ACL-7120A Layout

16 • Installation 2.8 ACL-7120A Software Library Installation The DOS software library is supplied with the ACL-7120A. Function prototypes and usefu

Seite 16

Signal Connections • 17 3 Signal Connections 3.1 Connector Pin Assignment The ACL-7120A comes equipped with five 20-pin insulation displacement conne

Seite 17 - 2.5 Base Address Setting

18 • Signal Connections CN1: Digital OUT (0-15) CN 2: Digital IN (0-15) 1 3 5 7 9 11 13 15 17 19 DO 0 DO 2 DO 4 DO 6 DO 8 DO 10 DO 12 DO 14 GND +5

Seite 18

Signal Connections • 19 CN 3: Digital OUT (16 - 31) CN 4: Digital IN (16 - 31) DO 16 DO 18 DO 20 DO 22 DO 24 DO 26 DO 28 DO 30 GND +5V DO 17 DO 1

Seite 19 - 2.6 Interrupt Settings

20 • Signal Connections CN 5: COUNTER CLK 2 OUT 2 GATE 2 EVENT GATE 3 GATE 4 EXT IRQ GND +5V CLK 1 OUT 1 GATE 1 CLK 0 OUT 0 GATE 0 GND 1 3 5 7 9 11

Seite 20

Signal Connections • 21 3.2 Timer/counter signal pads Counter 0Counter 1Counter 2CLK0GATE0OUT0CLK1GATE1CLK2GATE2OUT1OUT28254 Timer/CounterCN5 Pin-8C

Seite 21

22 • Signal Connections 3.3 Interrupt Trigger Source The second interval timer/counter 8254 chip on the ACL-7120A is used to generate sources for in

Seite 22

Signal Connections • 23 3.4 Clock Source Pads In addition to the clock signal pads, the frequency sources can also be wired through the soldering pa

Seite 23 - Signal Connections

Copyright 1995, 2003 ADLINK TECHNOLOGY INC. All Rights Reserved. Manual Rev. 1.00: May 30, 2003 Part No: 50-11031-100 The information in this docum

Seite 24

24 • Signal Connections 3.5 Latch Digital Inputs The ACL-7120A offers a handy method to latch the input status for special applications. A latched i

Seite 25

Programming • 25 4 Programming 4.1 I/O Registers Format The ACL-7120A occupies 16 consecutive addresses in the PC I/O address space. Table 4.1 show

Seite 26

26 • Programming 4.2 Digital I/O Programming The ACL 7120A provides 32 digital input channels and 32 digital output channels. Four I/O port address (

Seite 27 - Counter 0

Programming • 27 ♦ Write operation: The digital output states are written as 1 single byte to the port at address BASE+N (N=0,1,2,3). Data is written

Seite 28 - Counter 5

28 • Programming 4.3 Programmable Interval Timer Note: The material of this section is adopted from “Intel Microprocessor and Peripheral Handbook V

Seite 29 - 3.4 Clock Source Pads

Programming • 29 Before loading or reading any of these individual counters, the control byte (Base + 7, Base + 11) must be loaded first. The format

Seite 30 - 3.5 Latch Digital Inputs

30 • Programming 4.3.3 Mode definition There are six different selectable operating modes in the 8254: Mode 0: Interrupt on terminal count The outpu

Seite 31 - Programming

Programming • 31 Mode 3: Square Wave Rate Generator. Similar to Mode 2 except that the output will remain high until one half of the count has been

Seite 33

Warranty Policy• 33 Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please

Seite 34 - 4.3.2 The Control Byte

Getting Service from ADLINK Customer Satisfaction is top priority for ADLINK TECHNOLOGY INC. If you need any help or service, please contact us. ADL

Seite 35

34 • Warranty Policy • Damage caused by leakage of battery fluid during or after change of batteries by customer/user. • Damage from improper repa

Seite 36 - 4.3.3 Mode definition

Table of Contents Chapter 1 Introduction... 1 1.1 Features ...

Seite 37

ii • How to Use This Guide How to Use This Guide This manual is designed to assist users in understanding the ACL-7120A and describes how to modify

Seite 38

Introduction • 1 1 Introduction The ACL-7120A digital I/O and counter/timer card consists of 32 digital input, 32 digital output, and 4 timer/counter

Seite 39 - Warranty Policy

2 • Introduction 1.1 Features • Fully compatible with ADLINK ACL-7120 and Advantech PCL-720 • 32 TTL digital input channels • 32 TTL digital outp

Seite 40

Introduction • 3 1.3 Specifications ♦ General Specification: • Dimensions: 193.5 mm x 114 mm • Bus: PC-AT bus • I/O port address: Hex 200 - Hex 3FF

Kommentare zu diesen Handbüchern

Keine Kommentare