ADLINK Technology PCI-MPG24 Bedienungsanleitung Seite 3

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken
  • Seite
    / 10
  • Inhaltsverzeichnis
  • LESEZEICHEN
  • Bewertet. / 5. Basierend auf Kundenbewertungen
Seitenansicht 2
5
Video Input
Form Factor
Dimension
Power consumption
PCIe-CML64F
PCIe-CML64F
Single Channel PCI Express Camera Link Frame Grabber
Supports one channel Camera Link in base/medium/full configuration
PCI Express x4 compliant
High-speed image transfer rates up to 640MB/sec
Acquisition pixel clock rates up to 85 MHz
128MB of 200MHz DDR SDRAM on-board memory
2 programmable GPIO, differential/TTL trigger input
Serial communication via Camera Link
Features
Software Support
Supports Windows XP/XP embedded
Supports VC++ 6.0, VB 6.0, BCB 6.0
PCIe-CML64FB PCI Express x4 Camera Link frame grabber
PCIe-CML64FP PCI Express x4 Camera Link frame grabber with FPGA image
pre-processing
Ordering Information
The PCIe-CML64F is a PCI Express x4 compliant Camera Link® frame
grabber that supports one channel base/medium/full configuration,
multi-tap area, and line scan color and monochrome Camera Link
cameras.
The PCIe-CML64F series utilizes an FPGA design for greater image
acquisition flexibility, higher performance, and improved pre-processing
functionality (such as pixel gain/offset correction).
The PCIe-CML64F provides a 128MB frame buffer to buffer and rearrange
pixel data from the camera, before passing it to the PCI Express bus
DMA, a feature ideal for industrial machine vision applications, such
as high speed inspection and high resolution acquisition.
Scanning modes supported by the PCIe-CML64F include using a line-
scan camera in the following modes:
· Page trigger – triggered events trigger the acquisition of a given
number of lines (an area acquisition system)
· Line trigger – the system continuously acquires and transfers lines
from the camera based on the line trigger signal (no lines are skipped)
· Free-run – image acquisition is controlled by software, without any
trigger input
Introduction
Specifications
Digital
Video InputVideo InputVideo Input
Camera Link LVDS deferential signals
Base configuration: via a Data1 MDR26 26-pin connector
Medium and full configuration: via Data1 and Data2 MDR26 26-pin connectors
Maximum Camera Link data rate: 85MHz
External Signal InputExternal Signal InputExternal Signal Input
RS-422 signal: external A, B, Z phase deferential signal inputs, maximum frequency: 1 MHz
External page trigger
One channel digital input , one channel digital output
CamerCamera Supporta SupportCamera Support
Base cameras: 3 x 8-bit/tap, 1 x 16-bits/tap, 2 x 12-bit/tap
Medium cameras: 4 x 8-bit/tap, 4 x 12-bit/tap
Full cameras: 8 x 8-bit/tap
CamerCamera Controla ControlCamera Control
RS-422 signal: CC1-CC4 control signals in the Data1 MDR26 26-pin connector
Form FactorForm FactorForm Factor
Half length PCI Express x4 compliant
DimenDimensions sions Dimensions
174.62 x 111.15 mm
PowerPower consumption consumptionPower consumption
0.6A @ +12V, 2A @ +3.3V
PCI
EXPRESS
®
RGB Camera
Grayscale Camera
Camera Link
CAMERA
5-3
Seitenansicht 2
1 2 3 4 5 6 7 8 9 10

Kommentare zu diesen Handbüchern

Keine Kommentare